Improvement in internal frame generator

Improve way how internal packet generator is executed (mostly in HLS simulation), allowing to make it more similar to "standard" network collection. This required to modify network stack cores, so they can be executed in parallel in HLS simulation.

fpga/hls/frame_summation_tb.cpp

@@ -60,8 +60,9 @@ int test(size_t nframes, int16_t min, int16_t max) {
     for (int i = 0; i < nframes; i++)
         compl_in << axis_completion{.packet_mask = packet_mask, .frame_number = 100 + i, .packet_count = 128, .last = 0};
     compl_in << axis_completion{.last = 1};
+    ap_uint<1> idle;
 
-    frame_summation(input, output, compl_in, compl_out);
+    frame_summation(input, output, compl_in, compl_out, idle);
 
     if (compl_in.size() != 0) {
         std::cout << "compl_in should be empty: " << compl_in.size() << std::endl;